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Magillem Registers

Magillem Registers

ArterisKraków, Województwo małopolskie, Polska
5 days ago
Job description

Arteris enables engineering and design teams at the world's most transformative brands to connect and integrate today's system-on-chips (SoCs) that fuel modern innovation.

If you've held a smartphone, driven an electronic car, or powered up a smart TV, you've come in contact with what we do at Arteris. Here, the future is quite literally in your hands—and when it isn't, chances are it is flying overhead in a drone, a satellite, or in the cloud at a datacenter

As a CsrC

Design Verification Engineer

at Arteris your role will work on the most advanced System-on-Chip (SoC) assembly and HSI flows with the aim to influence the development environment, the architecture, the verification, and everything in-between.

Nature And Scope Of Responsibilities

  • Definition, documentation, development, and execution of simulation based verification test for Arteris Register Bank compiler tool, able to run on any available RTL simulator (Cadence, Synopsys, Siemens).
  • Definition, documentation, development, and execution of validation tests using Python scripting for qualifying additional Register tool collaterals (IP-XACT, C Header files, Documentation).
  • Maintain and enhance tests in the continuous integration flow, improve metrics, and increase automation.
  • Help improve and refine processes, methodologies, and metrics.
  • Be familiar with modern tools for specifications / documentation, tasks and project tracking (like Confluence and Jira).
  • Internal / external working relationships.
  • Collaborate with developers to identify testing needs and scenarios specific to EDA.
  • Participate in code reviews and unit testing with other developers to ensure code quality.

Experience Requirements / Qualifications (technical & Skills)

  • 7+ years of industry experience as RTL verification engineer
  • Strong expertise in UVM framework
  • Understanding of hardware RTL design languages (VHDL, Verilog, SystemVerilog)
  • Proficient with Python scripting language
  • Knowledge of IP-XACT standard, C-HAL, and equivalence checking tools is a plus.
  • Good written and verbal communication skills in English
  • Curious, autonomous, rigorous, and delivery-oriented with a commitment to quality and a thorough approach to the work.

    • Education Requirements

  • Engineering degree in computer science or a related field.

    • Language(s) Requirements

  • Fluent English
  • Proficiency in French would be a plus

    • About Arteris :

    Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today's electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next.

    With over 250 employees with headquarters in Silicon Valley and offices around the globe, we are a catalyst for SoC innovation so companies ranging from startups to the biggest technology market leaders can effectively create new products with proven connectivity flexibility and ease. Learn more

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    Register • Kraków, Województwo małopolskie, Polska