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Staff Hardware Design Engineer

Staff Hardware Design Engineer

ArterisKraków, Województwo małopolskie, Polska
7 dni temu
Opis pracy

Overview

Arteris enables engineering and design teams at the world’s most transformative brands to connect and integrate today’s system-on-chips (SoCs) that fuel modern innovation. If you’ve held a smartphone, driven an electronic car, or powered a smart TV, you’ve interacted with what we do at Arteris. Here, the future is literally in your hands—and when it isn’t, chances are it is flying overhead in a drone, a satellite, or in the cloud at a datacenter!

Position

As a Staff Hardware Design Engineer at Arteris your role will be to develop hardware components, and ensuring delivery on time and with the required quality. You are responsible for the design of an entire system.

Key Responsibilities

  • Write architecture specifications for highly configurable on-chip networks, respecting the most stringent coverage requirements in design verification.
  • Contribute to the design of hardware blocks and ensure their quality.
  • Participate in the verification methodology and regression environment.
  • Communicate with hardware and software teams to ensure product cohesion.
  • Maintain and improve existing versions in collaboration with the application engineering team.
  • Support colleagues on technical issues.

Experience & Qualifications Requirements

  • At least 8 years of experience in SoC / IP / NoC designs.
  • Experience in coherent and non-coherent communication protocols and control models (e.g. AMBA, PCIe, CXL, OCP, others) as well as CPU architectures (ARM / RISC-V).
  • Strong experience in SoC / IP design flow (e.g. specification, architecture, RTL coding, verification, DFT, synthesis, power and timing closure).
  • Excellent problem solving, strong communication and teamwork skills.
  • Knowledge of SystemC, Verilog / VHDL / System Verilog, Cadence / Synopsys / Mentor Graphics (backend tools), C++, Python, scripting languages.
  • Master’s degree or Doctorate in engineering or computer science.
  • Fluent English and French a plus.

    • About Arteris

    Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today’s electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next. With over 250 employees with headquarters in Silicon Valley and offices around the globe, we are a catalyst for SoC innovation so companies ranging from startups to the biggest technology market leaders can effectively create new products with proven connectivity flexibility and ease. Learn more at arteris.com.

    Seniority level

  • Mid-Senior level

    • Employment type

  • Full-time

    • Job function

  • Engineering and Information Technology

    • Industries

  • Semiconductor Manufacturing

    • #J-18808-Ljbffr

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    Design Engineer • Kraków, Województwo małopolskie, Polska